Hardware reference
Board-level interfaces and constraints for opentag one V2.2. Values here are taken from the released schematic, netlist, BOM, and firmware pin assignments.
Architecture
| Subsystem | Part | Connection |
|---|---|---|
| Controller | STM32G474CCT6 | 170 MHz Cortex-M4F |
| UWB | DWM3000 | SPI1; channel 9 ranging firmware |
| CAN physical layer | TCAN1044VDRQ1 | FDCAN2, PB12 RX / PB13 TX |
| Host / programming | USB-C | USB CDC serial and STM32 ROM DFU |
| Debug | 10-pin Cortex Debug | SWDIO, SWCLK, NRST, VTref, GND |
J2 power and CAN connector
Pin numbering follows the KiCad schematic and exported V2.2 netlist. Verify the physical pin-1 marker before attaching power.
| Pin | Net | Function |
|---|---|---|
1 | CAN_L | CAN low bus line |
2 | CAN_H | CAN high bus line |
3 | +12V | External board power input |
4 | GND | Power return and CAN reference |
The TCAN1044VDRQ1 is a fault-protected CAN FD transceiver with a VIO logic supply. The word “isolated” in an old schematic-library description is incorrect. Connect bus ground to J2 pin 4 and do not treat the board as an isolation boundary.
CAN termination
R20 is 120 Ω and SW3 places it across CAN_H and CAN_L when closed. Enable it only when the tag is at a physical end of the bus. A correctly terminated two-ended bus measures about 60 Ω between CANH and CANL with power removed.
USB modes
- Normal boot
- Enumerates as USB CDC serial when a ranging image is installed.
- BOOT0 held
- Enters the STM32 system bootloader and enumerates as STM32 DFU for role flashing.
- SWD
- Used by
probe-rsfor development builds, RTT logs, and hardware debugging.
Source files
The hardware is open source. Use the current KiCad source for layout work and the exported netlist for machine-readable connectivity.